Physical Design Engineer Resume Sample
Work Experience
- Multi-voltage island-based floorplan design and support,
- Design automation to enable early development/debug,
- Die size estimation and bondout approval,
- Flow development and automation implementation,
- Timing closure support to maximize process node capability,
- Clock tree setup/debug and synthesis for optimal QoR,
- General physical implementation procedures,
- Good scripting skills with Perl and TCL
- Successful execution of ASICs from product definition to production release
- Solid analytical, communication and presentation skills
- Self-motivated and the ability to drive without supervision
- Prior experience in telecom design space
- Chip floor-planning, dealing with multiple power domains and analog constraints
- Automatic placement, clock tree synthesis, and routing, with multi criteria optimization (power, area, timings)
- Delivering Physical Verification-clean designs,
- Interfacing with external vendors and IP sources to resolve problems
- Working with members from international design/implementation teams
- Work closely with RTL designers to debug and root-cause Physical Implementation issues related to design, tools, etc. and arrive at a feasible solution through the augmentation of input and design collateral
- Deliver methodology and design flows for place & route, STA, formal equivalency, power grid analysis and physical verification DRC/LVS across the design space. Manage stakeholders across analog and digital teams while interfacing with EDA vendors on issues/features/enhancements
- Familiar with industry standard CAD methodologies from Cadence, Synopsys and/or Mentor
- Experience in advanced technology nodes: 28nm, 16nm and below
Education
Professional Skills
- Prior experience working with multi-site group members with strong team building skills
- Good digital logic design skills, understanding of processor architecture (preferably X86) and X86 assembly language programming skills
- Independent thinker, creativity, strong problem solving skills and analytical ability, out of the box thinking
- Strong engineering problem solving and analytical skills
- Experience with physical design of memory compilers and proficient Programming skills UNIX shell script, Tcl, Perl
- Excellent communication skills including the ability to clearly articulate concepts (in verbal and written form) to stakeholders inside Cray
- Strong problem solving skills to tackle difficult challenges
How to write Physical Design Engineer Resume
Physical Design Engineer role is responsible for design, programming, physical, perl, scripting, unix, automation, tcl, timing, digital.
To write great resume for physical design engineer job, your resume must include:
- Your contact information
- Work experience
- Education
- Skill listing
Contact Information For Physical Design Engineer Resume
The section contact information is important in your physical design engineer resume. The recruiter has to be able to contact you ASAP if they like to offer you the job. This is why you need to provide your:
- First and last name
- Telephone number
Work Experience in Your Physical Design Engineer Resume
The section work experience is an essential part of your physical design engineer resume. It’s the one thing the recruiter really cares about and pays the most attention to.
This section, however, is not just a list of your previous physical design engineer responsibilities. It's meant to present you as a wholesome candidate by showcasing your relevant accomplishments and should be tailored specifically to the particular physical design engineer position you're applying to.
The work experience section should be the detailed summary of your latest 3 or 4 positions.
Representative Physical Design Engineer resume experience can include:
- Develop the skills of less experienced layout designers through formal training, coaching or mentoring
- Excellent debugging skills to diagnose and devise workarounds for flow/design issues
- Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams
- Strong hands-on TCL/Perl development skills
- Proven analytical skills (application of math and physics to solve problems)
- Scripting skills in Perl/Python etc
Education on a Physical Design Engineer Resume
Make sure to make education a priority on your physical design engineer resume. If you’ve been working for a few years and have a few solid positions to show, put your education after your physical design engineer experience. For example, if you have a Ph.D in Neuroscience and a Master's in the same sphere, just list your Ph.D. Besides the doctorate, Master’s degrees go next, followed by Bachelor’s and finally, Associate’s degree.
Additional details to include:
- School you graduated from
- Major/ minor
- Year of graduation
- Location of school
These are the four additional pieces of information you should mention when listing your education on your resume.
Professional Skills in Physical Design Engineer Resume
When listing skills on your physical design engineer resume, remember always to be honest about your level of ability. Include the Skills section after experience.
Present the most important skills in your resume, there's a list of typical physical design engineer skills:
- Attention to details, strong organization skills
- Strong leadership skills, Self-motivated, independent thinker
- Strong written and verbal communication skills to work with Cross functional and Cross Site Design teams
- Detail oriented, self-motivated team worker, good verbal and written communication skills
- Strong organizational skills required to perform to multiple projects on-going simultaneously
- Good (verbal and written) communication skills
List of Typical Experience For a Physical Design Engineer Resume
Experience For Senior Physical Design Engineer Resume
- Solid skill sets of STA relative EDA tools
- To effectively work within a team of other Physical Design Engineers and be responsible for the Physical Design for a portion of one of our ASIC’s
- Timing Constraints development, timing constraints validation, signoff Static Timing Analysis and full-chip & block-level timing closure
- Hands-on experience in top level PD tasks - Floorplanning, Power Structure planning, Placement, Clock Tree Synthesis, Routing and LVS/DRC
- From a CAD tool perspective, experience with floorplanning tools, P&R flows, global timing verification and physical design verification flows
Experience For Asic Physical Design Engineer Resume
- Good understanding in digital design, layout and timing closure
- Has proven track record for technical steering of physical design Team for on-time delivery
- Experience running an industry standard EDA tool for fullchip assembly and Physical Verification (LVS/DRC) is required
- Good understanding of global integration and full chip physical verification
- Good understanding of top level integration as it pertains to block design
- Experience with Synopsys design tools, flows and methodology using ICCDP, Design Compiler, ICC/ICC2
Experience For Digital Physical Design Engineer Resume
- Experience in Static Timing Analysis
- Good understanding of Synopsys suite (DCG, IC Compiler, IC Compiler 2), or Cadence suite (Genus Physical Design, EDI, Innovus)
- Good understanding of layout tools / methodologies
- Experience with large SoC designs (>100M gates) with frequencies in excess of 1GHz utilizing 16nm and more advanced technologies
- Experience in integrating IP and ability to specify and drive IP requirements in the physical domain
Experience For CPU Physical Design Engineer Resume
- Experience solving physical design challenges across various technologies such as DDR, PCIe, fabrics etc
- Experience in extraction of design parameters, QOR metrics, and analyzing trends
- Good team player working with geo-dispersed cross cultural and cross functional teams
- Strong team player, willing to share knowledge
- Experience with large SoC designs with frequencies in excess of 1GHz utilizing state of the art technologies
- Experience of low power chip implementation (including UPF) and multiple clock domains management is valuable
Experience For Lead Physical Design Engineer Resume
- Has 10 + years of Physical Design experience with recent contribution to project tape-outs, as a technical driver and as project lead
- Constraints development knowledge and STA experience
- Experience in ASIC physical design
- Experience of synthesis for low power SoCs, ARM based MPU design
- Experience in Physical Design. Knowledge-able in Cadence Tools
Experience For Senior Principal Physical Design Engineer Resume
- Experience with database technologies and database-driven custom web application development
- STA and timing constraints validation
- Experience in ASIC physical design
- Strong Technical Leader/Mentor
- Experience in Cadence Quantus, Tempus, Voltus, PVS tools
- Compose test plan and validation vectors to ensure functional completeness
- Experience in custom analog IC physical design
Experience For SOC Physical Design Engineer Resume
- Experience in ASIC Physical Design from RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm
- Scripting experience with Tcl, Perl or Python
- Experience with Cadence Virtuoso, VXL, Calibre tools
- Overall design experience, preferably with high performance IP designs
- 3-7years of overall design experience, preferably with high performance IP designs
Experience For Principal Physical Design Engineer Resume
- Experience in analog circuit design & layout design
- Experience with digital layout, memory layout
- Strong background DFM rules for advanced technology nodes is required
- Or more years of experience in physical design of deep submicron digital ASIC chips
- Experience in Analog VLSI layout design
Experience For Emerging Memory Physical Design Engineer Resume
- Experience with foundry technology in 65nm and 28nm nodes- Knowledge of layout of inductors, transformers and other passive devices
- New grad with MS in EE/CS or BS in EE/CS with 2+ years of hands-on experience in physical design
- Exposure on ASIC design, layout and semiconductor device/process through previous work/intern experience or course work
- Strong knowledge in system communication protocols like uART, I2C, SPI
- Experience in system design with Ethernet, USB2/3, PCIE, WIFI,and serial links
Experience For Senior Asic Physical Design Engineer Resume
- Experience in system power design for low power, high efficiency systems
- Experience in PCB design, hands on knowledge on schematic capture and layout
- Experience on physical design of VLSI or taken courses on physical design
- Experience with foundry technology in 28nm nodes and below
- Typically requires 5 years of physical design experience, with a passion to learn and grow as a physical design engineer
- Solid knowledge of PD construction & analysis flows and methodology
- Advantage: 3 years experience in analog layout (push polygon)
- BSEE or MSEEAt least 5-7 years of Layout experience in Advanced nodes 14 nm and 10nm
List of Typical Skills For a Physical Design Engineer Resume
Skills For Senior Physical Design Engineer Resume
- Strong debug and problem-solving skills for LVS, DRC and layout issues with minimal supervision
- Industry experience including good understanding of the following
- Strong experience in P&R, timing closure, synthesis, constraining and timing analysis required
- Strong hands-on Experience in various aspects of Physical Design flow – Floor planning, Placement, CTS, Route, timing analysis and eco flows
- BSEE with 5 years of experience or MS with at least 3 years of experience in physical design using industry standard EDA tools
- Strong knowledge and experience in Block-level and Full-chip Floor-planning and Physical verification
Skills For Asic Physical Design Engineer Resume
- Strong hands-on Experience in various aspects of Physical Design flow – Floor planning,
- 2) Well versed in UNIX , programming skills in C/C++ or Perl/TCL and
- 2) Well versed in UNIX , programming skills in C/C++ or Perl/TCL and relevant Computer Aided Design CAD tools
- Experience in CAD methodology and problem solving skill
- BA or BS with 8 years’ experience or a MS with 5 years of industrial experience with Electrical Engineering or related disciplines
- BS in EE with 8+ years of relevant experience, MS with 6+ years of related experience
- Physical Design (PD) Lead Engineer role requires strong knowledge and experience in Physical Design of full chips and complex blocks
- Skills in C or C++ or Perl scripting
- Academic Qualification: M.Tech/B.Tech in EC/EE- Analog/Custom Layout Design experience- Hands on experience in Intel Process Tool Methodology
Skills For Digital Physical Design Engineer Resume
- Academic Qualification: B.E/B.Tech in EC/EE- Analog/Custom Layout Design experience- Hands on experience in Intel Process Tool Methodology
- Knowledge of Cadence & Synopsys EDA tools and Linux scripting skills
- Experience – multiple experience levels from college to 10+ years
- Good communication skill, team spirit, initiative, innovative and fast learning
- MS in EE with 8+ years experience or BS in EE with 10+ years related experience
- Solid skill sets of one of Cadence/Synopsys/Mentor EDA tools
- Strong knowledge and experience in Physical Design of IP blocks and/or full chips
- Strong experience in all PD tasks related to ASIC chip design
- Have strong experience using: Synopsys, ICC2, System Verilog, Verilog
Skills For CPU Physical Design Engineer Resume
- Hands on experience of laying out memory core, analog, mixed signal and digital IC layout experience
- Strongh floor/placement, power and signal planning experience
- Prior management experience
- Prior experience with layout of the standard cells for APR, custom standard cell library, scribe layouts, and runset regression test cases
- Scripting experience in Tickle, Perl, or Shell
- Programming experience, preferably TCL
- Scripting experience in TCL, python or perl
- Experience with scripting/programming using Tcl/Tk/Perl
Skills For Lead Physical Design Engineer Resume
- Experience solving routing, clock tree, timing and DRC/LVS issues
- Has solid engineering understanding of the underlying concepts of IC design, implementation flows and methodologies
- Strong understanding of digital and mixed-signal timing understanding required
- Experience with successfully closing timing/LVS/DRC in complex, high performance digital blocks using industry standard Place & Route tools is required
- BS + 8 years of experience OR a MS + 7 in Electrical Engineering or Computer Engineering, with focus in the following areas
- Strong knowledge with Physical design best known practices concerning floor-planning, routing techniques, clock distribution
Skills For Senior Principal Physical Design Engineer Resume
- Experience in writing and producing software code using languages such as PERL and TCL
- Some experience in completing PD tasks – Floorplanning, Placement, Clock Tree Synthesis, Routing and LVS/DRC
- Experience solving 2.5GHz+ timing violations across multiple corners, with understanding of AOCV/POCV, derates, margins
- Low Power Implementation using power gating techniques and implementation, drawing upon strong UPF/CPF flow knowledge
- Perform static timing analysis, create timing constraints and validation, critical path analysis and timing sign-off
- Demonstrable experience in floor planning and routing
- VHDL partitioning, block-level synthesis, and high-frequency timing take down experience
- BS in Electrical Engineering and/or Computer Engineering 2+ years of experience in VLSI AND
Skills For SOC Physical Design Engineer Resume
- Strong understanding of all aspects of custom layout methodology; including familiarity with industry-standard CAD tools and flows
- Expertise in static timing analysis: clock definitions, constraints, exceptions and validation of timing coverage
- Experience with top level power routing, floor planning and ESD considerations
- Experience in UNIX operating system, scripting languages such as PERL, TCL
- BSEE or MS with 7-10 years of experience running an industry standard EDA tools
- BSEE or MS with 4-7 years of experience running an industry standard EDA tools
- Experienced in working in a global team and dynamic environment
Skills For Principal Physical Design Engineer Resume
- Experience using Place&Route tools
- Experience with CPU and GFx core hardening
- Proven record of bring design from concept to production
- Experience in high speed memory system design, including DDR3, LPDDR3 and LPDDR4
- Experience using recent technology nodes
- Has good knowledge of digital timing analysis & power analysis
- Strong TCl, Perl programming & Unix script required
- STA (Static Timing Analysis) experience
- Solid understanding of basic electronic circuit functionality and behaviors passive and active circuit structures
Skills For Emerging Memory Physical Design Engineer Resume
- Good working knowledge of Complementary Metal-Oxide Semiconductor CMOS
- Experience in leading one or more aspects of physical design
- Cache Circuit Design-Timing and critical design experience
- Experience in Clock/Power Distribution, P&R, Timing closure, RC Extraction, and verification on advanced technology nodes
- Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications
- Experience performing place and route in 28nm process or below
Skills For Senior Asic Physical Design Engineer Resume
- Experience in Python, C and/or C++ programming
- Experience leading the full chip APR/Implementation/Integration, preferably with technical oversight of a small team of engineers
- Experience using design rule checkers and layout verification
- Experience with block implementation, extraction, timing and or full-chip designs
- Hands-on design engineering experience within the semiconductor industry
- Strong expertise in the RTL2GDSII flow development or design implementation in leading process technologies
- Some experience in transistor and gate-level static timing and noise analysis
- Experience fixing physical verification violations in finfet technology: DRC, EMIR
List of Typical Responsibilities For a Physical Design Engineer Resume
Responsibilities For Senior Physical Design Engineer Resume
- Strong Experience with LVS, DRC, layout integration and tape-out
- Experience Working with a process team in the path finding phase by laying out core and related pitch cells/blocks for new process node
- Provides guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence
- Scripting experience in Tcl, and/or Perl to develop/support flows related to block physical design
- Experience with EDA Place & Route tools like ICC2 or Innovus or similar tools and Timing tools like Primetime or similar
- Experience in Analog, parasitic aware Layout including IR drop -, Electro migration knowhow
- Strong expertise in the RTL2GDS flow development and design implementation in leading process technologies
Responsibilities For Asic Physical Design Engineer Resume
- Experience implementing new flows based on industry standard tools
- Hands –on experience in leading PnR tools Synopsys ICC/Cadence Encounter etc
- Strong background in Calibre, Assura, ICC2 etc
- Experience in Physical Design or Design Implementation
- Applying deep knowledge of timing optimization and experience with ECO generation to analyze and fix timing issues in 40nm, 28nm and below
- Experience with Very Large Scale Integration (VLSI) physical design
- Experience and/or knowledge of Complementary Metal-Oxide Semiconductor CMOS
- Experience in VLSI design, verification, or implementation
- Experience in
Responsibilities For Digital Physical Design Engineer Resume
- Experience in ASIC physical design flow and methodologies in 7nm, 16nm and 28nm process nodes
- Experience in P&R tools, expertise in Netlist-to-GDSII flow
- BS or AAS in Mech. Eng with 3-5 years of design experience
- Experience with low power design features and flows
- Physical Design experience with recent contribution to project tape-outs
- Have hands-on experience in physical design with EDA tools
Responsibilities For CPU Physical Design Engineer Resume
- Relevant experience
- Experience with FinFET technology
- Experience with Intel’s advanced technology nodes
- MSEE or MSCS with 5+ year experience of digital physical design
- Experience with RTL 2 GDSII concepts and flows
- Experience with industry standard toolsets from Cadence (SOC) or Synopsys (ICC)
- Experience of physical verification such as DRC, LVS and XOR
- Demonstrable experience in RLS
- Demonstrable experience in physical design convergence and tape-in
Responsibilities For Lead Physical Design Engineer Resume
- Experience in RTL/Logic design
- In analog/mixed-signal/logic layout design and verification with deep sub-micron CMOS experience
- Have experience with analog and DFM best practices
- Experience in Analog layout designs such as DAC, ADC, differential OP amps and Base band filters circuits
- Experience in RF layout designs such as RX, TX and VCO circuits
- Tapeout experience in 28nm and blow process design
Responsibilities For Senior Principal Physical Design Engineer Resume
- Computer Architecture o Previous experience with Intel's technology, physical design flows and methodology
- Experience in analog layout
- Technical experience in Cadence Design Framework is welcome but not required
- Timing convergence at the SoC level, hierarchical design planning and path clearing of complex integrated circuits and blocks
- Working on necessary script coding to help on flow efficiency
- Handling design for manufacturing, physical verification, formal verification
- Handling the design-for-security and design-for-manufacturing
- Completing PD tasks on recent Technologies
- Working knowledge of finfet issues
Responsibilities For SOC Physical Design Engineer Resume
- Timing constraints creation
- Working on physical verification group for dGPU projects, includs DRC/LVS etc
- Working knowledge of layout design across diversity of memory types, IO designs, PLLs and analog environments is required
- Understanding of the Honolulu Authority for Rapid Transportation’s network infrastructure
- Scripting knowledge -Innovative and solution seeker
- Working (hands on) knowledge on place & route, synthesis and STA for full chip complex designs
Responsibilities For Principal Physical Design Engineer Resume
- Bring knowledge in process technology (physics) / design methodology (CAD) standard and advanced technologies
- Working knowledge of DFT techniques
- Performing the power analysis, cross talk analysis
- Optimizing the area, power, yield and speed
- Verifying the Bond Diagram
Responsibilities For Emerging Memory Physical Design Engineer Resume
- Floorplanning sub hierarchy block level which is routable design and has the highest utilization
- Obtaining the best solution clock tree for the sub block design
- Providing sub block design which passes DRC, ERC, LVS, Formality(LEC) and IR checks. For some low power design, the team uses check with UPF
- Automating and advancing flows using proficiency in Perl/Tcl scripting
- Floorplanning at full chip level, macro placement, power grid implementation, power routing and custom/special routing
Responsibilities For Senior Asic Physical Design Engineer Resume
- Scheduling assignments independently into the right intermediate milestones according to multiple parameters and assumptions given project constraints
- Managing multiple physical design constraints and converging layout design to schedule
- Clocking network planning and analysis
- Timing verification using Synopsys PrimeTime
- Enabling low power implementation methods
- Solving complex design process problems